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FEATURES Ultralow Power 400 A Power Supply Current (4 mW on 5 VS) Specified for Single Supply Operation High Speed 270 MHz, -3 dB Bandwidth (G = +1) 170 MHz, -3 dB Bandwidth (G = +2) 280 V/ s Slew Rate (G = +2) 28 ns Settling Time to 0.1%, 2 V Step (G = +2) Low Distortion/Noise -63 dBc @ 1 MHz, V O = 2 V p-p -50 dBc @ 10 MHz, VO = 2 V p-p 4.0 nV/Hz Input Voltage Noise @ 10 MHz Good Video Specifications (RL = 1 k , G = +2) Gain Flatness 0.1 dB to 30 MHz 0.11% Differential Gain Error 0.4 Differential Phase Error APPLICATIONS Signal Conditioning A/D Buffer Power-Sensitive, High-Speed Systems Battery Powered Equipment Loop/Remote Power Systems Communication or Video Test Systems Portable Medical Instruments PRODUCT DESCRIPTION
270 MHz, 400 A Current Feedback Amplifier AD8005
FUNCTIONAL BLOCK DIAGRAM 8-Lead Plastic DIP and SOIC
NC 1 -IN 2 +IN 3 -VS 4
AD8005
8 NC 7 +VS 6 OUT 5 NC
NC = NO CONNECT
5-Lead SOT-23
OUT 1 -VS 2 +IN 3 4 -IN 5 +VS
AD8005
The AD8005 is an ultralow power, high-speed amplifier with a wide signal bandwidth of 170 MHz and slew rate of 280 V/s. This performance is achieved while consuming only 400 A of quiescent supply current. These features increase the operating time of high-speed battery-powered systems without reducing dynamic performance.
3 2
NORMALIZED GAIN - dB
The current feedback design results in gain flatness of 0.1 dB to 30 MHz while offering differential gain and phase errors of 0.11% and 0.4. Harmonic distortion is low over a wide bandwidth with THDs of -63 dBc at 1 MHz and -50 dBc at 10 MHz. Ideal features for a signal conditioning amplifier or buffer to a high-speed A-to-D converter in portable video, medical or communication systems. The AD8005 is characterized for +5 V and 5 V supplies and will operate over the industrial temperature range of -40C to +85C. The amplifier is supplied in 8-lead plastic DIP, 8-lead SOIC and 5-lead SOT-23 packages.
-40
G = +2 VOUT = 200mV p-p RL = 1k DISTORTION - dBc
-50
1 0 -1 -2 -3 -4 -5 -6 0.1
G = +2 VOUT = 2V p-p RL = 1k 3RD
2ND
-60
3RD
VS = 5V
-70 2ND -80
VS = +5V
-90
1
10 FREQUENCY - MHz
100
500
-100 1 FREQUENCY - MHz 10 20
Figure 1. Frequency Response; G = +2, VS = +5 V or 5 V
Figure 2. Distortion vs. Frequency; VS = 5 V
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999
AD8005-SPECIFICATIONS
5 V SUPPLIES (@ T = +25 C, V =
A S
5 V, RL = 1 k
Conditions
unless otherwise noted)
Min AD8005A Typ Max Units
Parameter DYNAMIC PERFORMANCE
-3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Slew Rate (Rising Edge) Settling Time to 0.1% DISTORTION/NOISE PERFORMANCE
RF = 3.01 k for "N" Package or RF = 2.49 k for "R" Package or RF = 2.10 k for "RT" Package G = +1, VO = 0.2 V p-p G = +2, VO = 0.2 V p-p G = +2, VO = 0.2 V p-p G = +10, VO = 4 V p-p, RF = 499 G = +2, VO = 4 V Step G = -1, VO = 4 V Step, RF = 1.5 k G = +2, VO = 2 V Step RF = 3.01 k for "N" Package or RF = 2.49 k for "R" Package or RF = 2.10 k for "RT" Package fC = 1 MHz, VO = 2 V p-p, G = +2 fC = 10 MHz, VO = 2 V p-p, G = +2 NTSC, G = +2 NTSC, G = +2 f = 10 MHz f = 10 MHz, +IIN -IIN
225 140 10
270 170 30 40 280 1500 28
MHz MHz MHz MHz V/s V/s ns
Total Harmonic Distortion Differential Gain Differential Phase Input Voltage Noise Input Current Noise DC PERFORMANCE Input Offset Voltage
-63 -50 0.11 0.4 4.0 1.1 9.1 5 30 50 1 2 10 12
dBc dBc % Degrees nV/Hz pA/Hz pA/Hz mV mV V/C A A A A nA/C k M pF V dB V V mA mA A A dB C
TMIN to TMAX Offset Drift +Input Bias Current TMIN to TMAX -Input Bias Current TMIN to TMAX Input Bias Current Drift ( ) Open-Loop Transimpedance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short Circuit Current POWER SUPPLY Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE
Specifications subject to change without notice.
40 0.5 5 6 1000 90 260 1.6 3.8 54 +3.90 -3.90 10 60 400 TMIN to TMAX VS = 4 V to 6 V 56 -40 66
400 +Input -Input +Input VCM = 2.5 V Positive Negative RL = 50 46 +3.7
-3.7
475 560 +85
-2-
REV. A
AD8005 +5 V SUPPLY (@ T = +25 C, V = +5 V, R = 1 k
A S L
to 2.5 V unless otherwise noted)
Min AD8005A Typ Max Units
Parameter DYNAMIC PERFORMANCE
Conditions RF = 3.01 k for "N" Package or RF = 2.49 k for "R" Package or RF = 2.10 k for "RT" Package G = +1, VO = 0.2 V p-p G = +2, VO = 0.2 V p-p G = +2, VO = 0.2 V p-p G = +10, VO = 2 V p-p, RF = 499 G = +2, VO = 2 V Step G = -1, VO = 2 V Step, RF = 1.5 k G = +2, VO = 2 V Step RF = 3.01 k for "N" Package or RF = 2.49 k for "R" Package or RF = 2.10 k for "RT" Package fC = 1 MHz, VO = 2 V p-p, G = +2 fC = 10 MHz, VO = 2 V p-p, G = +2 NTSC, G = +2, RL to 1.5 V NTSC, G = +2, RL to 1.5 V f = 10 MHz f = 10 MHz, +IIN -IIN
-3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Slew Rate (Rising Edge) Settling Time to 0.1% DISTORTION/NOISE PERFORMANCE
190 110 10
225 130 30 45 260 775 30
MHz MHz MHz MHz V/s V/s ns
Total Harmonic Distortion Differential Gain Differential Phase Input Voltage Noise Input Current Noise DC PERFORMANCE Input Offset Voltage
-60 -50 0.14 0.70 4.0 1.1 9.1 5 35 50 1 2 10 11
dBc dBc % Degrees nV/Hz pA/Hz pA/Hz mV mV V/C A A A A nA/C k M pF V dB V mA mA 425 475 +85 A A dB C
TMIN to TMAX Offset Drift +Input Bias Current TMIN to TMAX -Input Bias Current TMIN to TMAX Input Bias Current Drift ( ) Open-Loop Transimpedance INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Short Circuit Current POWER SUPPLY Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE
Specifications subject to change without notice.
40 0.5 5 8 500 120 300 1.6 1.5 to 3.5 54 0.95 to 4.05 10 30 350 TMIN to TMAX VS = +4 V to +6 V 56 -40 66
50 +Input -Input +Input VCM = 1.5 V to 3.5 V 48 1.1 to 3.9
RL = 50
REV. A
-3-
AD8005
ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V Internal Power Dissipation2 Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline Package (R) . . . . . . . . . . . . . . . . . . 0.75 Watts SOT-23-5 Package (RT) . . . . . . . . . . . . . . . . . . . 0.5 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . VS 1 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 3.5 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R & RT Package . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range (A Grade) . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic DIP Package: JA = 90C/W 8-Lead SOIC Package: JA = 155C/W 5-Lead SOT-23 Package: JA = 240C/W
The maximum power that can be safely dissipated by the AD8005 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately +150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of +175C for an extended period can result in device failure. While the AD8005 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves shown in Figure 3.
2.0
MAXIMUM POWER DISSIPATION - Watts
TJ = +150C 8-LEAD PLASTIC-DIP PACKAGE 1.5 8-LEAD SOIC PACKAGE 1.0
0.5 5-LEAD SOT-23 PACKAGE
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C
70 80 90
Figure 3. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Model AD8005AN AD8005AR AD8005AR-REEL AD8005ART-REEL AD8005AR-REEL7 AD8005ART-REEL7 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 8-Lead Plastic DIP 8-Lead Plastic SOIC 13" Tape and Reel 13" Tape and Reel 7" Tape and Reel 7" Tape and Reel Package Option N-8 SO-8 SO-8 RT-5 SO-8 RT-5 Brand Code
H1A H1A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8005 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. A
Typical Characteristics-AD8005
5 4 3 VS = 5V VOUT = 200mV p-p RL = 1k G = +1 5 4 3 VS = 5V VOUT = 200mV p-p RL = 1k
NORMALIZED GAIN - dB
2 1 0 -1 -2 -3 -4 -5 1
NORMALIZED GAIN - dB
2 1 0 -1 -2 -3 -4 G = -10 RF = 1k G = -1 RF = 1.5k
G = +2 G = +10 RF = 499
10 FREQUENCY - MHz
100
500
-5
1
10 FREQUENCY - MHz
100
500
Figure 4. Frequency Response; G = +1, +2, +10; VS = 5 V
Figure 7. Frequency Response; G = -1, -10; VS = 5 V
6.2 6.1 6.0
140 120 100 GAIN - dB 80 GAIN 60 PHASE
0 -40 -80 -120 -160 -200 -240 -280 1G PHASE - Degrees
5.9
GAIN - dB
5.8 5.7 5.6 5.5 5.4 G = +2 VOUT = 200mV p-p RL = 1k
40 20
5.3 5.2 0.1 1 10 FREQUENCY - MHz 100 500
0 1k 10k 100k 1M 10M FREQUENCY - Hz 100M
Figure 5. Gain Flatness; G = +2; VS = 5 V or +5 V
Figure 8. Transimpedance Gain and Phase vs. Frequency
7 6 PEAK-TO-PEAK OUTPUT VOLTAGE ( 1%THD) - Volts 5 4 VS = 5V VOUT = 2V p-p
10 9 8 7 6 5 4 3 2 1
1 10 100 FREQUENCY - MHz 500
GAIN - dB
3 2 1 0
VS = 5V VOUT = 4V p-p
VS = +5V G = +2 RL = 1k
-1 -2
0 0.5
1
10 FREQUENCY - MHz
100
Figure 6. Large Signal Frequency Response; G = +2, RL = 1 k
Figure 9. Output Swing vs. Frequency; VS = 5 V
REV. A
-5-
AD8005-Typical Characteristics
-40 G = +2 VOUT = 2V p-p RL = 1k 3RD -60 3RD -70 2ND -80
DISTORTION - dBc
-40 2ND -50 G = +2 VOUT = 2V p-p RL = 1k 3RD -60 3RD 2ND
-50
DISTORTION - dBc
-70 2ND -80
-90
-90
-100 1 FREQUENCY - MHz 10 20
-100
1 FREQUENCY - MHz
10
20
Figure 10. Distortion vs. Frequency; VS = 5 V
Figure 13. Distortion vs. Frequency VS = +5 V
MIN = -0.06 MAX = 0.03 p-p/MAX = 0.09 0.10 0.10
MIN = -0.08 MAX = 0.04 p-p/MAX = 0.12
DIFF GAIN - %
0.05 0.00 -0.05 -0.10
DIFF GAIN - %
VS = 5V RL = 1k G = +2
0.05 0.00 -0.05 -0.10
VS = +5V RL = 1k TO +1.5V G = +2
MIN = -0.01 MAX = 0.39 p-p = 0.40
MIN = 0.00 MAX = 0.70 p-p = 0.70
DIFF PHASE - Degrees
0.04 0.02 0.00 -0.02 -0.04 -0.06 1st 2nd VS = 5V RL = 1k G = +2 3rd 4th 5th 6th 7th 8th 9th 10th 11th MODULATING RAMP LEVEL - IRE
DIFF PHASE - Degrees
0.06
1.0 0.5 0.0 -0.5 -1.0 1st VS = +5V RL = 1k TO +1.5V G = +2 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th MODULATING RAMP LEVEL - IRE
Figure 11. Differential Gain and Phase, VS = 5 V
Figure 14. Differential Gain and Phase, VS = +5 V
9 8 VS = 5V
9 8
SWING - V p-p
6 5 4 3 2 1 0 10 100 1k LOAD RESISTANCE - 10k VS = +5V
PEAK-TO-PEAK OUTPUT AT 5MHz ( 0.5% THD) - Volts
7
7 6 5 4 3 2 1 0 3
f = 5MHz G = +2 RL = 1k
4
5 6 7 8 9 TOTAL SUPPLY VOLTAGE - Volts
10
11
Figure 12. Output Voltage Swing vs. Load
Figure 15. Output Swing vs. Supply
-6-
REV. A
AD8005
-5 -10 -15 -20 VS = +5V OR G = +2 RL = 1k 5V
INPUT VOLTAGE NOISE - nV/ Hz
12.5
10.0
CMRR - dB
-25 -30 -35 -40 -45 -50 -55 0.03 0.1 1 10 FREQUENCY - MHz 100
7.5
5.0
2.5
0
10
100
1k
10k 100k FREQUENCY - Hz
1M
10M
Figure 16. CMRR vs. Frequency; VS = +5 V or 5 V
Figure 19. Noise vs. Frequency; VS = +5 V or 5 V
62.5
INPUT CURRENT NOISE - pA/ Hz
100
OUTPUT RESISTANCE -
VS = +5V AND RL = 1k G = +2
5V
50.0
37.5
10
VS = +5V
25.0
VS =
5V
12.5
INVERTING CURRENT NONINVERTING CURRENT
1 0.03
0.1
1 10 FREQUENCY - MHz
100
500
0
10
100
1k
10k 100k FREQUENCY - Hz
1M
10M
Figure 17. Output Resistance vs. Frequency; VS = 5 V and +5 V
10 0 -10 -20
PSRR - dB
Figure 20. Noise vs. Frequency; VS = +5 V or 5 V
VS = +5V OR G = +2 RL = 1k
5V
-PSRR
100
VOUT VIN VS = 5V G = +6 RL = 1k
+PSRR
90
-30 -40 -50
10
-60 -70 -80 0.03
0%
1V
0.1 1 10 FREQUENCY - MHz 100 500
2V
150ns
Figure 18. PSRR vs. Frequency; VS = +5 V or 5 V
Figure 21. Overdrive Recovery, VS = 5 V, VIN = 2 V Step
REV. A
-7-
AD8005-Typical Characteristics
RG RF CPROBE RL 1k VOUT VIN 51.1 CPROBE 1.5k 1.5k RL 1k VOUT
VIN 50 0.01 F 0.01 F PROBE : TEK P6137 CLOAD = 10pF NOMINAL 10 F 10 F
+VS 0.01 F 0.01 F -VS PROBE : TEK P6137 CLOAD = 10pF NOMINAL 10 F 10 F
+VS
-VS
Figure 22. Test Circuit; G = +2; RF = RG = 3.01 k for N Package; RF = RG = 2.49 k for R and RT Packages
Figure 25. Test Circuit; G = -1, RF = RG = 1.5 k for N, R and RT Packages
100 90
100 90
10 0%
10 0%
50mV
10ns
50mV
10ns
Figure 23. 200 mV Step Response; G = +2, VS = 2.5 V or 5 V
Figure 26. 200 mV Step Response; G = -1, VS = 2.5 V or 5 V
100 90
100 90
10 0%
10 0%
1V
10ns
1V
10ns
Figure 24. Step Response; G = +2, VS = 5 V
Figure 27. Step Response; G = -1, VS = 5 V
-8-
REV. A
AD8005
APPLICATIONS Driving Capacitive Loads Single-Supply Level Shifter
Capacitive loads interact with an op amp's output impedance to create an extra delay in the feedback path. This reduces circuit stability, and can cause unwanted ringing and oscillation. A given value of capacitance causes much less ringing when the amplifier is used with a higher noise gain. The capacitive load drive of the AD8005 can be increased by adding a low valued resistor in series with the capacitive load. Introducing a series resistor tends to isolate the capacitive load from the feedback loop thereby diminishing its influence. Figure 29 shows the effects of a series resistor on capacitive drive for varying voltage gains. As the closed-loop gain is increased, the larger phase margin allows for larger capacitive loads with less overshoot. Adding a series resistor at lower closed-loop gains accomplishes the same effect. For large capacitive loads, the frequency response of the amplifier will be dominated by the roll-off of the series resistor and capacitive load.
RF
In addition to providing buffering, many systems require that an op amp provide level shifting. A common example is the level shifting that is required to move a bipolar signal into the unipolar range of many modern analog-to-digital converters (ADCs). In general, single supply ADCs have input ranges that are referenced neither to ground nor supply. Instead the reference level is some point in between, usually halfway between ground and supply (+2.5 V for a single supply 5 V ADC). Because highspeed ADCs typically have input voltage ranges of 1 V to 2 V, the op amp driving it must be single supply but not necessarily rail-to-rail.
R2 1.5k +5V R1 1.5k VIN 0.01 F 10 F
AD8005
VREF +5V R3 30.1k
RG
VOUT
R4 10k 0.1 F
AD8005
RS RL 1k CL
Figure 30. Bipolar to Unipolar Level Shifter Figure 28. Driving Capacitive Loads
80 VS = 70 CAPACITIVE LOAD - pF 60 50 RS = 5 40 30 RS = 0 20 10 0 5V 2V OUTPUT STEP WITH 30% OVERSHOOT RS = 10
Figure 30 shows a level shifter circuit that can move a bipolar signal into a unipolar range. A positive reference voltage, derived from the +5 V supply, sets a bias level of +1.25 V at the noninverting terminal of the op amp. In ac applications, the accuracy of this voltage level is not important. Noise is however a serious consideration. A 0.1 F capacitor provides useful decoupling of this noise. The bias level on the noninverting terminal sets the input commonmode voltage to +1.25 V. Because the output will always be positive, the op amp may therefore be powered with a single +5 V power supply. The overall gain function is given by the equation:
R2 R4 R2 V OUT = - V IN + 1+ V REF R1 R3 + R4 R1
1
2
3 4 CLOSED-LOOP GAIN - V/V
5
In the above example, the equation simplifies to
V OUT = -V IN + 2.5V
Figure 29. Capacitive Load Drive vs. Closed-Loop Gain
REV. A
-9-
AD8005
Single-Ended-to-Differential Conversion
RG VIN RT +VS RF RO VOUT
Many single supply ADCs have differential inputs. In such cases, the ideal common-mode operating point is usually halfway between supply and ground. Figure 31 shows how to convert a single-ended bipolar signal into a differential signal with a common-mode level of 2.5 V.
+5V 2.49k BIPOLAR SIGNAL 0.5V 0.1 F RIN 1k +5V 0.1 F
C1 0.01 F C2 0.01 F
C3 10 F C4 10 F
-VS
INVERTING CONFIGURATION
RG RF RO VOUT
2.49k
AD8005
RF1 2.49k RG 619 +5V 0.1 F RF2 3.09k VOUT
VIN RT C1 0.01 F C2 0.01 F C3 10 F C4 10 F -VS +VS
+5V 2.49k
NONINVERTING CONFIGURATION
AD8005
0.1 F
Figure 32. Inverting and Noninverting Configurations
2.49k
Figure 31. Single-Ended-to-Differential Converter
Amp 1 has its +input driven with the ac-coupled input signal while the +input of Amp 2 is connected to a bias level of +2.5 V. Thus the -input of Amp 2 is driven to virtual +2.5 V by its output. Therefore, Amp 1 is configured for a noninverting gain of five, (1 + RF1/RG), because RG is connected to the virtual +2.5 V of Amp 2's -input. When the +input of Amp 1 is driven with a signal, the same signal appears at the -input of Amp 1. This signal serves as an input to Amp 2 configured for a gain of -5, (-RF2/RG). Thus the two outputs move in opposite directions with the same gain and create a balanced differential signal. This circuit can be simplified to create a bipolar in/bipolar out single-ended to differential converter. Obviously, a single supply is no longer adequate and the -VS pins must now be powered with -5 V. The +input to Amp 2 is tied to ground. The ac coupling on the +input of Amp 1 is removed and the signal can be fed directly into Amp 1.
Layout Considerations
Chip capacitors have low parasitic resistance and inductance and are suitable for supply bypassing (see Figure 32). Make sure that one end of the capacitor is within 1/8 inch of each power pin with the other end connected to the ground plane. An additional large (0.47 F-10 F) tantalum electrolytic capacitor should also be connected in parallel. This capacitor supplies current for fast, large signal changes at the output. It must not necessarily be as close to the power pin as the smaller capacitor. Locate the feedback resistor close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. Capacitance variations of less than 1.5 pF at the inverting input will significantly affect high-speed performance. Use stripline design techniques for long signal traces (i.e., greater than about 1 inch). Striplines should have a characteristic impedance of either 50 or 75 . For the Stripline to be effective, correct termination at both ends of the line is necessary.
Table I. Typical Bandwidth vs. Gain Setting Resistors
Gain -1 -10 +1 +2 +10
RF 1.49 k 1 k 2.49 k 2.49 k 499
RG 1.49 k 100 2.49 k 56.2
RT 52.3 100 49.9 49.9 49.9
Small Signal -3 dB BW (MHz), VS = 5 V 120 MHz 60 MHz 270 MHz 170 MHz 40 MHz
In order to achieve the specified high-speed performance of the AD8005 you must be attentive to board layout and component selection. Proper RF design techniques and selection of components with low parasitics are necessary. The PCB should have a ground plane that covers all unused portions of the component side of the board. This will provide a low impedance path for signals flowing to ground. The ground plane should be removed from the area under and around the chip (leave about 2 mm between the pin contacts and the ground plane). This helps to reduce stray capacitance. If both signal tracks and the ground plane are on the same side of the PCB, also leave a 2 mm gap between ground plane and track.
-10-
REV. A
AD8005
Increasing Feedback Resistors
Unlike conventional voltage feedback op amps, the choice of feedback resistor has a direct impact on the closed-loop bandwidth and stability of a current feedback op amp circuit. Reducing the resistance below the recommended value makes the amplifier more unstable. Increasing the size of the feedback resistor reduces the closed-loop bandwidth.
360 A (rms) 562 4.99k +5V
In power-critical applications where some bandwidth can be sacrificed, increasing the size of the feedback resistor will yield significant power savings. A good example of this is the gain of +10 case. Operating from a bipolar supply ( 5 V), the quiescent current is 475 A (excluding the feedback network). The recommended feedback and gain resistors are 499 and 56.2 respectively. In order to drive an rms output voltage of 2 V, the output must deliver a current of 3.6 mA to the feedback network. Increasing the size of the resistor network by a factor of 10 as shown in Figure 33 will reduce this current to 360 A. The closed loop bandwidth will however decrease to 20 MHz.
AD8005
VIN 0.2V (rms) -5V QUIESCENT CURRENT 475 A (MAX)
VOUT 2V (rms)
Figure 33. Saving Power by Increasing Feedback Resistor Network
REV. A
-11-
AD8005
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
C2186a-0-8/99
0.195 (4.95) 0.115 (2.93) 0.430 (10.92) 0.348 (8.84)
8 5
0.280 (7.11) 0.240 (6.10)
1 4
PIN 1 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93)
0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN SEATING PLANE
0.325 (8.25) 0.300 (7.62)
0.022 (0.558) 0.100 0.070 (1.77) 0.014 (0.356) (2.54) 0.045 (1.15) BSC
0.015 (0.381) 0.008 (0.204)
8-Lead Plastic SOIC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 1 5 4
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) x 45 0.0099 (0.25)
SEATING PLANE
0.0500 0.0192 (0.49) (1.27) 0.0138 (0.35) BSC
0.0098 (0.25) 0.0075 (0.19)
8 0
0.0500 (1.27) 0.0160 (0.41)
5-Lead Plastic SOT-23 (RT-5)
0.1181 (3.00) 0.1102 (2.80)
0.0669 (1.70) 0.0590 (1.50)
3 4
2
1 5
0.1181 (3.00) 0.1024 (2.60)
0.0374 (0.95) BSC 0.0748 (1.90) BSC 0.0512 (1.30) 0.0354 (0.90) 0.0059 (0.15) 0.0019 (0.05) 0.0197 (0.50) 0.0138 (0.35) 0.0571 (1.45) 0.0374 (0.95) SEATING PLANE 10 0
0.0079 (0.20) 0.0031 (0.08)
0.0217 (0.55) 0.0138 (0.35)
-12-
REV. A
PRINTED IN U.S.A.

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